The present invention relates, in general, to a method of forming a metal line of a semiconductor memory device and, more particularly, to a method of forming a metal line of a semiconductor memory device, to prevent scattered reflection during an exposure process, thereby improving a process margin of a trench mask.
A damascene method is usually used to form dense metal lines, such as the bit lines of a semiconductor memory device at a level of 0.12 μm.
FIG. 1 is a cross-sectional view illustrating a conventional method of forming a metal line of a semiconductor memory device. A plurality of gates 11 is formed on a semiconductor substrate 10. A tunnel oxide layer, a floating gate, a dielectric layer, a control gate, a metal electrode layer and a hard mask are laminated on each gate 11. An ion implantation process is then performed to form a source and drain region 12. A nitride layer 13 is then formed. The nitride layer 13 is used as an etch-stop layer when an interlayer insulating layer is formed. A first interlayer insulating layer 14 is formed on the entire surface. A contact hole etch process and a contact formation process are performed to form a contact 15 connected to the source and drain region 12. After a second interlayer insulating layer 16 is formed, a nitride layer 17 to be used as an etch-stop layer during a damascene process is formed. Thereafter, a trench oxide layer 18 for forming a metal line, and a photoresist 19 to be used as a trench mask, are deposited.
In general, as the design rule of devices decreases, the contact 15 is formed from metal material, such as tungsten, rather than from impurity containing polysilicon due to resistance issues. However, tungsten exhibits severe scattered reflection characteristics. Accordingly, exposure energy used when forming a trench mask for a subsequent damascene process causes scattered reflection due to the contact, resulting in deformation of a photoresist pattern.